A motor controller suitable for making use of the present invention, which is a braking system, may energize the motor through an inverter circuit having a plurality of electronic switches that control the polarity of voltage applied to the motor's windings. A three-phase inverter having a pair of switching transistors for each phase can be used with a three-phase induction motor.
A controller for such a system often includes a programmable microprocessor for generating a pulsewidth-modulated (PWM) output, which can be changed by the microprocessor, for application to the motor. In a three-phase induction motor application, in which three windings are energized, the microprocessor and its logic circuits generate three digital output signals that are pulsewidth-modulated to approximate sine waves 120 degrees out of phase.
Whenever voltage is to be applied to the motor, two of the three digital outputs from the logic circuits have the same state, i.e., they are either high or low, and the third output is of the opposite state. Whenever zero voltage is to be applied to the motor, the three outputs are all of the same polarity. Motor voltage is established by controlling the amount of time spent in the zero voltage state relative to the time spent with voltage applied to the motor. These zero-voltage time intervals are often called "notches". The states of the digital outputs control the conductivity of respective electronic switches of the inverter.
Prior art apparatus of the type that is being described here briefly as background is described in more detail in U.S. Pat. application Ser. No. 07/225,091, filed July 27, 1988, inventor David J. Gritter, and assigned to the assignee of the present invention. That application is made a part of this application and incorporated herein by reference.
For safety and to prevent nuisance tripping of the drive, a current-limiting circuit sometimes is provided to monitor the DC bus current, which is proportional to the current flowing through the motor windings, and to generate a second modulation signal based upon the bus current. The bus current signal is compared in a comparator circuit with a reference signal generated by the microprocessor. When the bus current signal exceeds the reference signal, an output from the current limit circuit is applied to the microprocessor and/or logic circuit to impose a control similar to the modulation scheme imposed by the microprocessor speed control. The three sinusoidally-modulated signals are kept from advancing in phase and the motor voltage is forced to zero.
In normal operation the PWM inverter applies a frequency and voltage to the motor to obtain rated flux and establish an output speed. The back emf of the motor (i.e., "speed voltage", induced by flux in the rotor), equals the rotor speed times the flux. It opposes and approximately counters the applied terminal voltage so that the motor currents are well behaved. Voltage control is accomplished by periodically inserting zero-voltage "notches" in the waveform. Current-limit circuitry monitors the inverter's DC bus current and inserts additional notches whenever the bus current exceeds a predetermined value. These additional notches reduce both voltage and frequency and effectively control the peak transistor currents.
Since the notches act to short-circuit the motor's terminals, the motor's speed voltage (back-emf) is the only source available to reduce the amplitude of the motor's current. The notches are normally placed in a position in the waveform where the speed voltage of the motor is of the proper polarity to reduce motor current. If, however, the motor's speed voltage is not correctly oriented as to phase with respect to the applied terminal voltage, the speed voltage may not act to reduce the motor current during a notch. For example, if the speed voltage is forced to 180 degrees out of phase, it will always cause current to increase rather than decrease in a notch.
When DC braking is employed, the phase of the speed voltage with respect to the DC braking current is continuously varying and consequently periodically causes current to increase during a notch.
A conventional approach to providing DC braking of an induction motor controlled by an adjustable frequency drive utilizes a very-low-duty-cycle PWM DC voltage to impose a DC braking current in the motor. When this technique is used, the current level is dependent upon motor impedances, and its peak value may exceed the inverter trip level unless the drive is carefully adjusted. Furthermore, if this voltage is applied too rapidly, the motor's own speed voltage may cause the motor current to become uncontrolled. Thus it may be necessary to wait until the rotor flux has decayed essentially to zero before DC braking is enabled.